Belfast
2001,view from the River Lagan
close to the Ormeau Bridge.
The notice reads:
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LINKS
Bulgarian Experience
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Nanotechnology Workshop, Sofia, Nov
2000
Rain and wind
interminably lashed
the whole of Western Europe seemingly for months on end, while the
Balkans
were privilege to the sunniest autumnal months of the Continent. Sofia,
Bulgaria was host to an informative two days of lectures and
discussions
on the latest developments in nanoscience and technology featuring a
large
representation from BAS and Sofia University as well as the USSR and
Poland
with invited speakers from the West.
The workshop included presentations on
modelling, characterisation,
synthesis and processing with respect to optical, magnetic,
electrochemical,
chemical and mechanical properties of materials. Applications
covered
a wide range of topics from batteries to microelectronics and sensors. |
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Dr
Richard Hurley
Home
page |
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Silicon atoms bonding at the
junction of two
wafer surfaces brought together, (see NISRC
for wafer-bonding services). |
- Consultant
and lecturer in High Vacuum Science and Technology.
- Specialist
in thin film deposition, ion beam technology,
- electrical
phenomena in high vacuum and low-pressure systems.
![[QUB Icon]](lanyon_big.gif) The
Queen's University of Belfast
Northern
Ireland Semiconductor Research Centre
School
of Electrical and Electronic Engineering
Ashby
Building, Belfast BT9 5AH, UK
Telephone:
+44 (0)28 90329632/90274084
Fax:
+44 (0)28 90963595/90667023
e-mail:
ION...2004/2006.
Numbers
of participants continue to increase indicating the popularity of this
Polish conference on ion beams and related material science.
Proceedings
to be published in Vacuum
NISRCcurrent
research is producing ultra-thin silicon on silicide (SSOI) using
smart-cut
technology (H implantation), with silicon wafer-bonding. Of
particular
interest is the reduction of cross-talk achieved by locating the
silicide
layer underneath the insulating oxide layer. Applications include high
speed digital circuits and high frequency low noise analogue circuits
on
the same chip using a ground plane that effectively pins the
substrate
potential producing a major reduction in cross-talk.
NISRC
participating in a SILICON-GERMANIUM collaborative programme to develop
heterojunction bipolar transistors (HBTs). Funded by EPSRC (UK), other
Universities involved in the project include Southampton, Liverpool,
Surrey,
and Imperial College (report: Electronics Weekly, 22/11/2000).
IBM
's plans
for a 300mm fab include copper wiring, SOI, low-k dielectrics and line
widths below 100nm. Production expected 2003. |
| The
latest on Silicon wafer bonding was discussed at the 6th
Int. Symposium in San Francisco (ECS Int. Meeting), Sept 2001.
Silicon-on-Insulator
was a important topic with thin layers of high quality silicon being
produced
by methods as diverse as the explosion of implanted hydrogen bubbles to
slicing with high-pressure water jets, or just old-fashioned etching.
Needless
to say all these methods need a final smoothing process, either
polishing
or hydrogen annealing. |
'Stone Forest,' a remarkable
natural phenomenon
from 50 million years ago, situated 18km west of Varna and well worth a
visit.
Stone Forest (Pobitite
Komani)
There have been many theories, but
currently it is believed
that these carbonate - cemented sandstone structures were formed due to
microbial methane oxidation around natural gas seepages - so called
"bubbling
reefs". The cementation occurred in the sub-bottom marine sands some 50
million years ago and now are exposed by subsequent erosion of the
surrounding
unconsolidated sediments and vertical tectonic movements of the earth
crust. (http://www.varna-bg.com/). |
VEIT
2003 13th International Summer School on Vacuum, Electron and Ion
Technologies
15/09/03 - 19/09/03. First Announcement
VEIT 2001,
Twelfth International Summer School, Varna,
Bulgaria (17-21 Sept)
Sunny
Bulgaria was host to
a wealth of interesting papers and talk on Vacuum, Electron and Ion
Technologies.
The appalling events in America prevented the attendance of the North
American
speakers, a significant loss to the school program. The main emphasis
was
applications, especially thin films including hard coatings and
semiconductors,
(proceedings to be published in Vacuum).
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Relaxing
after Nanotechnology in Sozopol, Bulgaria, 2004.
To
the band!
Photography:
Vesselin Houbanov
Time Traveller
November
2002
Bon Dia! As
silicon wafer bonding scientists and engineers prepare for the ECS
Paris conference in 2003, they can look back to the delights of the
Autumn 2002 Workshop session in Barcelona, famous for its pickpockets,
seafood and Gaudi. Substantial emphasis on low temperature bonding for
MEMS, layer transfer, polymer substrates (for the flexible
transistor?),
with plasma processing seemingly now the standard treatment for bond
strengthening
(but can the particles be eliminated for good yield?). We look forward
to the Paris meeting.
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Sept
2001(San Francisco)
The ECS
Joint International Meeting included the 200th meeting of the ECS
itself.
It was an occasion for an expensive banquet for those on generous
expense
accounts. It has to be said there were some grim expressions amongst
delegates
when the wine-waiter failed to appear...? You guessed right; it was a
case
of 'if you want a drink with your meal, then buy it yourself,' from a
wheeled-in
bar! After an evening of self-service courses, the tables were cleared
in no uncertain fashion by the Hilton staff anxious to get off duty.
Thankfully
the technical program was of higher standard. Report
below. |
July 2001
Bulgarian
scientists desperate plea to the new Prime Minister (ex-King Simeon II)for
resources to keep science and technology alive in Bulgaria. Currently
scientists
have to travel abroad to read the literature. Equipment and consumables
urgently needed.
April
2001
Big Brother
could be a little
closer with DERA's new record in transmitting quantum
cryptography
keys (Electronics Weekly, 04/04/2001). Information is encoded on
polarisation states of individual photons; its impressive and using
satellites
will be used for secure communication between Governments. The
same
Governments of course that demand the right to monitor every facet of
the
Internet.
February
2001
As Gerald
Marcyk continues
his European tour, rumours persist in Ireland of Intel laying off
significant
numbers of staff. Has the downturn in the semiconductor industry
already
arrived?
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| While
in Varna visit the Archaeological
Museum in the centre of town, formerly a quite splendid girls' high
school, (in those days with red carpet ascending wide majestic stairs
to
the Principal's inner sanctum). Here lies the 'oldest gold in the
world,'
suggesting an independent civilisation in Bulgaria some 6000 years ago. |
Skeleton
adorned with gold
ornaments, (Varna Arch.
Museum) |
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Glyn
Moody of Computer Weekly suggests the use of the hyperlink on web-sites
may be under threat after a recent US ruling concerning DVD copyright,
(DeCSS case).This and other recent rulings from US judges on copyright
matters related to the Internet have quite serious implications for
civil
liberties. (DeCSS
case,
Harvard discussion)
The EFF
is a starting point to explore civil liberties issues on the net and
points
to some interesting legal cases in recent years.
How
is Broadband working out for you?
With optic
fibres outside
in the road it should be brilliant, but the truth is that without
all-optical
switching, optical fibre networks are severely limited in performance.
Packet-level optical switching could be ten years away!
Discussion,
Electronics Weekly Archives.
December
2000
Gerald Marcyk,
INTEL announces
prototype of new transistor belonging to the world of
nanotechnology
(CNET Dec 10, 5:30 pm PT). A CD of 30 nm allows chips containing 400
million
transistors to run at 10 GHz on <1V. Production expected in five
years
with applications in real-time language translation and speech
recognition.
October
2000
Philips
Semiconductor believes
the downturn in the global chip market will not come until the end of
2002
and in the meantime plans a new Euro 2bn fab capable of 0.12 and 0.10
micron
processes. The 0.12 micron process is currently under joint development
with STMicroelectronics at Crolles, France. Chip geometries below 0.1
micron
require lithography at 157 nm with resolution enhancement; ASML expects
to deliver tools by 2003.Latest news at:
http://www.electronicstimes.com
http://www.electronicsweekly.co.uk
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